SIHA14N60E www.vishay.com vishay siliconix s16-1601-rev. b, 15-aug-16 1 document number: 91706 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 e series power mosfet features ? low figure-of- merit (fom) r on x q g ? low input capacitance (c iss ) ? reduced switching and conduction losses ? ultra low gate charge (q g ) ? avalanche energy rated (uis) ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ? server and telecom power supplies ? switch mode power supplies (smps) ? power factor correctio n power supplies (pfc) ? lighting - high-intensity discharge (hid) - fluorescent ballast lighting ? industrial - welding - induction heating - motor drives - battery chargers - renewable energy - solar (pv inverters) notes a. repetitive rating; puls e width limited by maximu m junction temperature. b. v dd = 140 v, starting t j = 25 c, l = 28.2 mh, r g = 25 ? , i as = 3.1 a. c. 1.6 mm from case. d. i sd ? i d , di/dt = 100 a/s, starting t j = 25 c. e. limited by maximum junction temperature. product summary v ds (v) at t j max. 650 r ds(on) typ. ( ? ) at 25 c v gs = 10 v 0.269 q g max. (nc) 64 q gs (nc) 8 q gd (nc) 13 configuration single n-channel mo s fet g d s thin-lead to-220 fullpak s d g ordering information package thin-lead to-220 fullpak lead (pb)-free SIHA14N60E-e3 absolute maximum ratings (t c = 25 c, unless otherwise noted) parameter symbol limit unit drain-source voltage v ds 600 v gate-source voltage v gs 30 continuous drain current (t j = 150 c) e v gs at 10 v t c = 25 c i d 13 a t c = 100 c 8 pulsed drain current a i dm 32 linear derating factor 1.2 w/c single pulse avalanche energy b e as 136 mj maximum power dissipation p d 147 w operating junction and storage temperature range t j , t stg -55 to +150 c drain-source voltage slope t j = 125 c dv/dt 70 v/ns reverse diode dv/dt d 32 soldering recommendations (peak temperature) c for 10 s 300 c mounting torque m3 screw 0.6 nm
SIHA14N60E www.vishay.com vishay siliconix s16-1601-rev. b, 15-aug-16 2 document number: 91706 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes a. c oss(er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 % to 80 % v dss . b. c oss(tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 % to 80 % v dss . thermal resistance ratings parameter symbol typ. max. unit maximum junction-to-ambient r thja -65 c/w maximum junction-to-case (drain) r thjc -3.8 specifications (t j = 25 c, unless otherwise noted) parameter symbol test cond itions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = 250 a 600 - - v v ds temperature coefficient ? v ds /t j reference to 25 c, i d = 1 ma -0.73- v/c gate-source threshold voltage (n) v gs(th) v ds = v gs , i d = 250 a 2.0 - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na v gs = 30 v - - 1 a zero gate voltage drain current i dss v ds = 600 v, v gs = 0 v - - 1 a v ds = 480 v, v gs = 0 v, t j = 125 c - - 10 drain-source on-sta te resistance r ds(on) v gs = 10 v i d = 7 a - 0.269 0.309 ? forward transconductance g fs v ds = 30 v, i d = 7 a - 3.8 - s dynamic input capacitance c iss v gs = 0 v, v ds = 100 v, f = 1 mhz - 1205 - pf output capacitance c oss -62- reverse transfer capacitance c rss -5- effective output capacitance, energy related a c o(er) v ds = 0 v to 480 v, v gs = 0 v -52- effective output capacitance, time related b c o(tr) - 177 - total gate charge q g v gs = 10 v i d = 7 a, v ds = 480 v -3264 nc gate-source charge q gs -8- gate-drain charge q gd -13- turn-on delay time t d(on) v dd = 480 v, i d = 7 a, v gs = 10 v, r g = 9.1 ? -1530 ns rise time t r -1938 turn-off delay time t d(off) -3570 fall time t f -1530 gate input resistance r g f = 1 mhz, open drain 0.38 0.75 1.5 ? drain-source bo d y dio d e characteristics continuous source-drain diode current i s mosfet symbol showing the ? integral reverse ? p - n junction diode --13 a pulsed diode forward current i sm --32 diode forward voltage v sd t j = 25 c, i s = 7 a, v gs = 0 v - - 1.2 v reverse recovery time t rr t j = 25 c, i f = i s = 7 a, di/dt = 100 a/s, v r = 25 v - 281 - ns reverse recovery charge q rr -3.4-c reverse recovery current i rrm -22-a s d g
SIHA14N60E www.vishay.com vishay siliconix s16-1601-rev. b, 15-aug-16 3 document number: 91706 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) fig. 1 - typical output characteristics fig. 2 - typical output characteristics fig. 3 - typical transfer characteristics fig. 4 - normalize d on-resistance vs. temperature fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - c oss an d e oss vs. v ds 0 10 20 30 0 5 10 15 20 25 30 i d , drain-to- s ource current (a) v d s , drain-to- s ource voltage (v) t j = 25 c top 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v bottom 5 v 0 5 10 15 20 0 5 10 15 20 25 30 i d , drain-to- s ource current (a) v d s , drain-to- s ource voltage (v) t j = 150 c top 15 v 14 v 13 v 12 v 11 v 10 v 9 v 8 v 7 v 6 v bottom 5 v 0 10 20 30 0 5 10 15 20 25 i d , drain-to- s ource current (a) v gs , g ate-to- s ource voltage (v) t j = 150 c t j = 25 c v d s = 30.4 v 0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 r d s (on) , drain-to- s ource on-re s i s tance (normalized) t j , junction temperature ( c) i d = 7 a v gs = 10 v 1 10 100 1000 10 000 0 100 200 300 400 500 600 c, capacitance (pf) v d s , drain-to- s ource voltage (v) c i ss c o ss c r ss v gs = 0 v, f = 1 mhz c i ss = c g s + c gd , c d s s horted c r ss = c gd c o ss = c d s + c gd 0 1 2 3 4 5 6 7 8 10 100 1000 10 000 0 100 200 300 400 500 600 e o ss (j) c o ss (pf) v d s c o ss e o ss
SIHA14N60E www.vishay.com vishay siliconix s16-1601-rev. b, 15-aug-16 4 document number: 91706 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 7 - typical gate charge vs. gate-to-source voltage fig. 8 - typical source-drain dio d e forwar d voltage fig. 9 - maximum safe operating area fig. 10 - maximum drain cu rrent vs. case temperature fig. 11 - temperature vs . drain-to-source voltage 0 4 8 12 16 20 24 0 15304560 v gs , g ate-to- s ource voltage (v) q g , total g ate charge (nc) v d s = 480 v v d s = 300 v v d s = 120 v 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 i s d , rever s e drain current (a) v s d , s ource-drain voltage (v) t j = 150 c t j = 25 c v gs = 0 v 0.01 0.1 1 10 100 1101001000 i d , drain current (a) v d s , drain-to- s ource voltage (v) * v gs > minimum v gs at which r d s (on) i s s pecified limited by r d s (on) * 1 m s i dm limited t c = 25 c t j = 150 c s ingle pul s e bvd ss limited 10 m s 100 s operation in thi s area limited by r d s (on) 10 s 1 s 0.1 s 0 5 10 15 25 50 75 100 125 150 i d , drain current (a) t c , ca s e temperature ( c) 600 625 650 675 700 725 750 775 -60 -40 -20 0 20 40 60 80 100 120 140 160 v d s , drain-to- s ource breakdown voltage (v) t j , junction temperature ( c) i d = 250 a
SIHA14N60E www.vishay.com vishay siliconix s16-1601-rev. b, 15-aug-16 5 document number: 91706 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 12 - normalize d thermal transient impe d ance, junction-to-case fig. 13 - switching time test circuit fig. 14 - switching time waveforms fig. 15 - unclampe d in d uctive test circuit fig. 16 - unclampe d in d uctive waveforms fig. 17 - basic ga te charge waveform fig. 18 - gate charge test circuit 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 normalized effective tran s ient thermal impedance pul s e time ( s ) duty cycle = 0.5 0.2 0.1 0.05 0.02 s ingle pul s e pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10 v + - v ds v dd v ds 90 % 10 % v gs t d(on) t r t d(off) t f r g i a s 0.01 t p d.u.t. l v d s + - v dd 10 v vary t p to obtain re q uired i a s i a s v d s v dd v d s t p q gs q g d q g v g charge 10 v d.u.t. 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v current regulator current sampling resistors same type as d.u.t. + -
SIHA14N60E www.vishay.com vishay siliconix s16-1601-rev. b, 15-aug-16 6 document number: 91706 for technical questions, contact: hvm@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 19 - for n-channel ? ? ? ? ? ? ? ? ? ? vishay siliconix maintains worldw ide manufacturing ca pability. products may be manufactured at one of several qualified locatio ns. reliability da ta for silicon technology and package reliability represent a composite of all qu alified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91706 . p.w. period di/dt diode recovery dv/dt ripple 5 % body diode forward drop re-applied voltage rever s e recovery current body diode forward current v gs = 10 v a i s d driver gate drive d.u.t. l s d waveform d.u.t. v d s waveform inductor current d = p.w. period + - + + + - - - peak diode recovery dv/dt test circuit v dd ? dv/dt controlled by r g ? driver s ame type a s d.u.t. ? i s d controlled by duty factor d ? d.u.t. - device under te s t d.u.t. circuit layout con s ideration s ? low s tray inductance ? g round plane ? low leakage inductance current tran s former r g note a. v gs = 5 v for logic level device s v dd
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